19D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, and B.-G. Park"Single-Electron Transistors Based on Gate-Induced Si Island for Single-Electron Logic Application"IEEE Transactions on Nanotechnology, vol. 1, no. 4, pp. 170-175, 2002-12PDF
18S.-H. Lee, D. H. Kim, K. R. Kim, J. D. Lee, B.-G. Park, Y.-J. Gu, G.-Y. Yang, and J.-T. Kong"A Practical SPICE Model Based on the Physics and Characteristics of Realistic Single-Electron Transistors"IEEE Transactions on Nanotechnology, vol. 1, no. 4, pp. 226-232, 2002-12PDF
17D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang and D. Ahn"Single-Electron Transistors with Sidewall Depletion Gates on an SOI Nanowire and Their Application to Single-Electron Inverters"Journal of The Korean Physical Society, vol. 41, no. 4, pp. 505-508, 2002-10PDF
16K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, and B.-G. Park"Negative-Differential Transconductance Characteristics at Room Temperature in 30-nm Square-Channel SOI nMOSFETs With a Degenerately Doped Body"IEEE Electron Device Letters, vol. 23, no. 10, pp. 612-614, 2002-10PDF
15D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, and B.-G. Park"Fabrication of single-electron tunneling transistors with an electrically formed Coulomb island in a silicon-on-insulator nanowire"J. Vac. Sci. Technol. B., vol. 20, Issues 4, pp. 1410-1418, 2002-07PDF
14B. H. Choi, S. H. Son, K. H. Cho, S.W. Hwang, D. Ahn, D. H. Kim, J. D. Lee, B. G. Park"Direct observation of excited states in double quantum dot silicon single electron transistor"Microelectronic Engineering, vol. 63, Issues 1-3, pp. 129-133, 2002-07PDF
13K.-H. Chung, S.-K. Sung, D. H. Kim, W. Y. Choi, C. A. Lee, J. D. Lee and B.-G. Park"Nanoscale Multi-Line Patterning Using Sidewall Structure"Jpn. J. Appl. Phys., vol. 41, pp. 4410-4414, Part 1, no. 6B, 2002-06PDF
12B. H. Choi, Y. S. Yu, D. H. Kim, S. H. Son, K. H. Cho, S. W. Hwang, D. Ahn, and B. G. Park"Double-dot-like charge transport through a small size silicon single electron transistor"Physica E, vol. 13, pp. 946-949, 2002-03PDF
11D. H. Kim, K. R. Kim, S. K. Sung, J. D. Lee, and B.-G. Park"Dynamic exclusive-OR gate based on gate-induced Si island single electron transistor"IEE Electronics Letters, vol. 38, no. 11, pp. 527~529, 2002-05PDF
10S.-K. Sung, D. H. Kim, J.-S. Sim, K. R. Kim, Y. K. Lee, J. D. Lee, S. D. Chae, B. M. Kim, and B.-G. Park"Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology"Jpn. J. Appl. Phys., vol. 41, Part 1, no. 4B, pp. 2606-2610, 2002-04PDF
9K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn"Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire"Jpn. J. Appl. Phys., vol. 41, Part 1, no. 4B, pp. 2574-2577, 2002-04PDF
8D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, D. Ahn"Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic"IEEE Transactions on Electron Devices, vol. 49, nO. 4, pp. 627-635, 2002-04PDF
7S.-K. Sung, J.-S. Sim, D. H. Kim, J. D. Lee, and B.-G. Park"Nanoscale-Wire Patterning Using Side-Wall and Quantum Dot Memory Device Fabrication"Journal of the Korean Physical Society, vol. 40, no. 1, pp. 128~131, 2002-01PDF
6K. R. Kim, D. H. Kim, J. D. Lee, and B.-G. Park"Characteristics of Silicon-On-Insulator Single-Electron Transistors with Electrically Induced Tunnel Barriers"Journal of the Korean Physical Society, vol. 40, no. 1, pp. 140~144, 2002-01PDF
5D. H. Kim, S.-K. Sung, J. S. Sim, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn"Single-electron transistor based on silicon-on-insulator quantum wire fabricated by a side-wall patterning method"Appl. Phys. Lett., vol. 79, no. 23, pp. 3812~3814, 2001-12PDF
4D. H. Kim, J. D. Lee, and B.-G. Park"Room Temperature Coulomb Oscillation of a Single Electron Switch with an Ectrically Formed Quantum Dot and Its Modeling"Jpn. J. Appl. Phys., vol. 39, pp. 2329~2333, 2000-04PDF
3T.-S. Yoon, J.-Y. Kwon, D.-H. Lee, K.-B. Kim, S.-H. Min, D.-H.-Chae, D. H. Kim, J. D. Lee, and B.-G. Park"High spatial density nanocrystal formation using thin layer of amorphous Si0.7Ge0.3 deposited on SiO2"J. of Applied Physics., vol. 87, no. 5, pp2449~2453, 2000-03PDF
2D. H. Chae, D. H. Kim, Y. J. Lee, C. H. Kwak, J. D. Lee, B. G. Park, T. S. Yoon, J. Y. Kwon, K. B. Kim, K. R. Kim, N. J. Park, H. S. Yoon and S. J. Jeong"Nanocrystal Memory Cell Using High-Density Si 0.73Ge 0.27 Quantum Dot Array"J. Korean Physical Society, vol. 35, pp. S995~S998, 1999-12PDF
1D. H. Kim, D. H. Chae, J. D. Lee, B. G. Park, and H.-G. Lee"Silicon Single Electron Transistors with a Dual Gate Structure"J. Korean Physical Society, vol. 33, pp. s278-s282, 1998-11PDF