Journal papers

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  • 53 B. H. Choi, Y. S. Yu, D. H. Kim, S. H. Son, K. H. Cho, S. W. Hwang, D. Ahn, and B. G. Park "Double-dot-like charge transport through a small size silicon single electron transistor" Physica E, vol. 13, pp. 946-949, 2002-03 PDF
  • 52 D. H. Kim, K. R. Kim, S. K. Sung, J. D. Lee, and B.-G. Park "Dynamic exclusive-OR gate based on gate-induced Si island single electron transistor" IEE Electronics Letters, vol. 38, no. 11, pp. 527~529, 2002-05 PDF
  • 51 S.‐J. Choi, J.‐W. Han, S. Kim, D.‐I. Moon, M. Jang, and Y.‐K. Choi "Dopant‐Segregated Schottky Source/Drain FinFET with a NiSi FUSI Gate and Reduced Leakage Current" IEEE Transactions on Electron Devices, vol. 57 no. 11 pp. 2902–2906, 2010-11 PDF
  • 50 J.‐H. Ahn, S.‐J. Choi, J.‐W. Han, T. J. Park, S. Y. Lee, and Y.‐K. Choi "Double‐Gate Nanowire Field Effect Transistor for a Biosensor" Nano letters, vol. 10 no. 8 pp. 2934–2938, 2010-10 PDF
  • 49 S.-K. Sung, D. H. Kim, J.-S. Sim, K. R. Kim, Y. K. Lee, J. D. Lee, S. D. Chae, B. M. Kim, and B.-G. Park "Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology" Jpn. J. Appl. Phys., vol. 41, part 1, no. 4b, pp. 2606-2610, 2002-04 PDF
  • 48 D.‐I. Moon, S.‐J. Choi, J.‐W. Han, S. Kim, and Y.‐K. Choi "Fin‐Width Dependence of BJT‐Based 1T‐DRAM Implemented on FinFET" IEEE Electron Device Letters, vol. 31 no. 9 pp. 909–911, 2010-09 PDF
  • 47 K. R. Kim, D. H. Kim, S.-K. Sung, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, and D. Ahn "Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire" Jpn. J. Appl. Phys., vol. 41, part 1, no. 4b, pp. 2574-2577, 2002-04 PDF
  • 46 S.‐J. Choi, J.‐W. Han, D.‐I. Moon, S. Kim, M. Jang, and Y.‐K. Choi "P‐Channel Nonvolatile Flash Memory With a Dopant‐Segregated Schottky‐Barrier Source/Drain" IEEE Transactions on Electron Devices, vol. 57 no. 8 pp. 1737–1742, 2010-08 PDF
  • 45 D. H. Kim, S.-K. Sung, K. R. Kim, J. D. Lee, B.-G. Park, B. H. Choi, S. W. Hwang, D. Ahn "Silicon single-electron transistors with sidewall depletion gates and their application to dynamic single-electron transistor logic" IEEE Transactions on Electron Devices, vol. 49, no. 4, pp. 627-635, 2002-04 PDF
  • 44 D.‐I. Moon, S.‐J. Choi, J.‐W. Han, and Y.‐K. Choi "An Optically Assisted Program Method for Capacitorless 1T‐DRAM" IEEE Electron Device Letters, vol. 57 no. 7 pp. 1714–1718, 2010-07 PDF
  • 43 S.-K. Sung, J.-S. Sim, D. H. Kim, J. D. Lee, and B.-G. Park "Nanoscale-Wire Patterning Using Side-Wall and Quantum Dot Memory Device Fabrication" Journal of the Korean Physical Society, vol. 40, no. 1, pp. 128~131, 2002-01 PDF
  • 42 K. R. Kim, D. H. Kim, J. D. Lee, and B.-G. Park "Characteristics of Silicon-On-Insulator Single-Electron Transistors with Electrically Induced Tunnel Barriers" Journal of the Korean Physical Society, vol. 40, no. 1, pp. 140~144, 2002-01 PDF
  • 41 M. Jang, Y. Park, M. Jun, Y. Hyun, S.‐J. Choi, and T. Zyung "The Characteristics of Seebeck Coefficient in Silicon Nanowires Manufactured by CMOS Compatible Process" Nanoscale Research Letters, vol. 5 pp. 1654– 1657 2010, 2010-07 PDF
  • 40 S. J. Song, H. T. Kim, S. S. Chi, M. S. Kim, W. S. Chang, S. D. Cho, H. T. Shin, T. E. Kim, H. J. Kang, D. J. Kim, and D. M. Kim "Characterization of Interface States in MOS Systems using Photonic High-Frequency Capacitance-Voltage Responses" J. of the Korean Phys. Soc., vol. 41, no. 6, pp. 892-895, 2002-12 PDF
  • 39 S.‐J. Choi, J.‐W. Han, D.‐I. Moon, and Y.‐K. Choi "Analysis and Evaluation of a BJT‐Based 1T‐DRAM" IEEE Electron Device Letters, vol. 31 no. 5 pp. 393–395, 2010-05 PDF
  • 38 S. D. Cho, S. J. Song, H. C. Kim, Y. C. Kim, S. K. Kim, S. S. Chi, D. J. Kim, and D. M. Kim "Comprehensive Characterization and Modeling of Abnormal Gate Leakage Current in Pseudomorphic HEMTs" J. of the Korean Phys. Soc., vol. 40, no. 4, pp. 577-583, 2002-04 PDF
  • 37 S. Kim, O. Yarimaga, S.‐J. Choi, and Y.‐K. Choi "Highly durable and flexible memory based on resistance switching" Solid‐State Electronics, vol. 54 pp. 392–396, 2010-04 PDF
  • 36 S.‐J. Choi, J.‐W. Han, S. Kim, D.‐I. Moon, M. Jang, and Y.‐K. Choi "High‐Performance Polycrystalline Silicon TFT on the Structure of a Dopant‐Segregated Schottky‐Barrier Source/Drain" IEEE Electron Device Letters, vol. 31 no. 3 pp. 228–230, 2010-03 PDF
  • 35 D. M. Kim, H. C. Kim, and H. T. Kim "Photonic High-Frequency Capacitance-Voltage Characterization of Interface States in Metal-Oxide-Semiconductor Capacitors" IEEE Trans. Electron Devices, vol. 49, no. 3, pp. 526-528, 2002-03 PDF
  • 34 H. C. Kim, H. T. Kim, S. D. Cho, S. J. Song, Y. C. Kim, S. K. Kim, S. S. Chi, D. J. Kim, and D. M. Kim "Photonic Characterization of Capacitance-Voltage Characteristics in MOS Capacitors and Current-Voltage Characteristics in MOSFETs" J. of the Korean Phys. Soc., vol. 40, no. 1, pp. 64-67, 2002-01 PDF